should have B.E/B.Tech/M.E/M.Tech engineering in Electrical/Electronics/Computer ... and in dealing with workload peaks Job Category : Software Engineering Primary Location : Germany-Germany,... full job description

This role includes leading a team of RF/HW engineers, as well as systems engineering and diagnostic SW engineering resou ... working knowledge on Wireless LAN protocols. --Chip level RF knowledge is desirable. --Experience with FCC,... full job description

Requirements include: - Bachelors or Masters degree in Computer Science/Computer Engineering/Software Engineering from ... remote customers/stakeholders. Job Category : Software Engineering Primary Location : India-India,... full job description

are elegant and accessible to all. As a design verification engineer you will work with a fast paced Integrated Wireless ... Minimum of 3 years experience working on ATE, Chip Bring-up, Gate Level Verification, IP Integration, VIP... full job description

This role includes leading a team of RF/HW engineers, as well as systems engineering and diagnostic SW engineering resou ... --Good working knowledge on Wireless LAN protocols. --Chip level RF knowledge is desirable. --Experience with FCC,... full job description

responsible for verification closure of block/chip/system level functions for mixed signal based IP. Experience with ... Knowledge of VLSI design flows & DFT 3) Familiarity of high level programming language 4) Experience working with... full job description

of Complex Blocks. Should have excellent experience in Chip Verification. Job Requirements 1. Educational ... Worked on functional verification of complex blocks, full chip from micro-architecture phase 5. Expert in... full job description

-Any Post Graduate School & Graduation -Any Graduate Level:Junior - Executive, Assistant Experience:0 - 1 ... have 1 year of prior experience of selling IT solutions for Engineering colleges , schools and real estate... full job description

mission is to manage power consumption at both the chip and system level, leveraging the industry's lowest power FPGAs and unique mixed-signal FPGAs to offer system designers a competitive edge. Actel's history of reliability, coupled... full job description

L3 – Chip level Hardware Engineers Experience: 2 to 4 years working experience 1) ITI in Electronics Trade or 2) ... or Electronics & Telecommunication or 7) Chip Level Repair Engineer of Desktop Computer Motherboard, Laptop... full job description

Requisition Number: 12-9097 Job Title: Verification Engineer-2 Country: India State/Province/County: Karnataka City: Ban ... and will be responsible for verification closure of block/chip/system level functions for mixed signal based IP. full job description

Requisition Number: 12-8552 Job Title: ASIC DvDs Eng 1 Country: India State/Province/County: Karnataka City: Bangalore R ... ASSP programs. As an integral member of the customer design engineering team, the ASIC Customer Engineer has... full job description

Job Category: Engineering Job Type: Experienced Job Description:Creates bottoms-up elements of chip design and validate ... cell and block-level custom/mixed signal layouts, FUB-level floor plans, abstract view generation, RC extraction,... full job description

Lead verification team to successfully complete block/chip/system level verification. Perform ASIC verification ... bring-up. Lead a team of engineers to successfully deliver chip from specification to tape out. Need to make and... full job description

a)Applicants should have B.E/B.Tech/M.E/M.Tech engineering in Electrical/Electronics/Computer Science. ... JTAG, Lauterbach and ETM Trace. f)Able to review board level schematics and identify problems. g)Knowledge of... full job description

a) Applicants should have B.E/B.Tech/M.E/M.Tech engineering in Electrical/Electronics/Computer Science. b) ... JTAG, Lauterbach and ETM Trace. f) Able to review board level schematics and identify problems. g) Knowledge of... full job description

of the chip from RTL/gates to tapeout. The Physical Design Engineer will be responsible for 1. full chip activities ... Understanding OCV, DFM, DFY • Excellent Block level and Full-chip physical design skills • Self-motivated,... full job description

of the chip from RTL/gates to tapeout. The Physical Design Engineer will be responsible for 1. full chip activities ... Understanding OCV, DFM, DFY • Excellent Block level and Full-chip physical design skills • Self-motivated,... full job description

both at block level, IP/macro level, as well as chip-level. This includes: floor planning, placement, ... OCV, DFM, DFY o Excellent Block level and Full-chip physical design skills o Back ground of all aspects of... full job description

cell and block-level custom/mixed signal layouts, FUB-level floor plans, abstract view generation, RC extraction, ... skills would be an added advantage Job Category : Engineering Primary Location : India-India,... full job description

we are offering “ADVANTEK” – a complete chip level maintenance curriculum in association with CETE Kolkata, Ministry Of Information Technology, Government Of India. This association shall enable our students to use the most well equipped... full job description

programs. As an integral member of the customer design engineering team, the ASIC Customer Engineer has ... skills, and for interfacing to many different people and engineering teams within LSI. Position requires weekly... full job description

Employer will accept Master’s degree in Computer Engineering, Electrical Engineering or related technical field ... characterization for timing, area and power; 4) Block level and cell level layout; 5) Schematic entry and layout... full job description

high performance unit level integration for processor chip. Responsibilities include, floor planning, planning ... into lower level macros, physical integration of the lower level abstracts at the next higher level, timing closure,... full job description

DRC/ TRC Engineer: Should have experience in repairing motherboard, SMPS, Chip Level service. full job description

should be able to come up with microarchitecture of chip/block from high-level architecture. Should have ... Lead/Tech Lead Functional Area Embedded/EDA /VLSI/ASIC/Chip Design Education UG - Any Graduate - Any... full job description

Understanding of ATE and test engineering. Post-Silicon debug. Programming in Perl, tcl, awk and c/c++. Experience in ... Design Engineer Functional Area Engineering Design, R&D Education UG - B.Tech/B.E... full job description

TetraMax, LogicVision. Experience in Full-Chip DFT implementation of Scan, EDT/Adaptive Scan, JTAG, MBIST, ... Understanding of ATE and test engineering. Post-Silicon debug. Programming in Perl, tcl, awk and c/c++. Experience in... full job description

Information Technology Preferred: Master's, Computer Engineering and/or Computer Science Experience 3 - 5 ... / Secunderabad Keywords Multimedia Display Software Engineer, Customer Engineering, ASICs Design, Linux,... full job description

TetraMax, LogicVision. Experience in Full-Chip DFT implementation of Scan, EDT/Adaptive Scan, JTAG, ... Understanding of ATE and test engineering. Post-Silicon debug. Programming in Perl, tcl, awk and c/c++. Experience in... full job description

such as Bugzilla Experience in verifying multimillion gate chip designs from specifications to tape-out Excellent ... Lead/Project Lead Functional Area Engineering Design, R&D Education UG - B.Tech/B.E... full job description

We Required Hardware Faculty, Laptop Chip Level Service Engineer. PC Hardware & Basic Networking, Laptop Chip Level Service Engineer full job description

JOB_CODE: SOC_DESIGN_002 Designation: Design Engineer ... 0-1 years. Experience Level: 0-8 Plus years experience. BE or MS/MTech in ECE/EE/Comp Eng/Comp Science preferably from... full job description

JOB_CODE: BSP_001. Designation: Technical Manager 5-8 years. Experience Level: 0-8 Plus years experience. BE or MS/MTe ... Kernel Development. Device Driver development. Board and Chip Bring-up. Requirements: Linux 2.6 Kernel driver... full job description

techniques in Linux for connectivity Solutions, Kernel level debug experience, Scripting in Perl. TCL or CGI to ... to Completion, To design and develop driver and protocol level software for various innovative technologies currently... full job description

Knowledge of the following is a plus: SystemVerilog On-chip busses like AHB, OCP etc External busses like USB, PCI ... engineers. Handle customer interactions at a technical level. Provide support to the sales team (provide answers to... full job description

techniques in Linux for connectivity Solutions, Kernel level debug experience, Scripting in Perl. TCL or CGI to ... to Completion, To design and develop driver and protocol level software for various innovative technologies currently... full job description

Simulation skills Netlist level simulation with SDF backannotation Developing testbench and/or simulation models of high speed blocks. Analog and Mixed Simulation tool flow and debug skills. Protocol Skills Working experience in... full job description

DFT Engineer (2-10 Yrs) with B.Tech/ Masters Degree in Electronics. # Should have handled chip-level hierarchical DFT ... Block & Chip level ATPG, Fault coverage improvements & simulation with Timing Scan failures/blockage, DFT DRC failures,... full job description

STA / TIMING Engineer (2-8 Yrs exp) # Worked on full chip synthesis using Synopsys DC / Cadence RC compiler # Experience ... # SOC/Chip level Timing closure & Signoff of High Speed complex design with Multiple clocks & Power domains # Timing Con... full job description

Experienced Senior level physical design engineers with 5-10 years of hands on design experience and having participated in at least 3-4 full chip tapeouts. Desired Candidate ProfilePlease refer to the Job description above Experience... full job description

Responsible for all Type Photocopier & Printer (both) Machine Chip Level Repairing & Maintenance, Related, Software & Hardware Installation Process, Power In-out Checking. Chip Level Repairing, Diploma full job description

Candidate should have expereince in repairing chip level service engineer who should have experience in repairing ... service engineer,engineer,chip level chip,chip level network engineer Desired Candidate... full job description

devices like USB, UART, I2C, SPI interfaces. • Driver level appreciation of system drivers like CLOCK, GPIOs, INT ... Prior experience on Qualcomm chip-sets is a huge plus. Desired Candidate ProfileSkills / Attributes Required • BE/B.Tec... full job description

of the chip from RTL/gates to tapeout. The Physical Design Engineer will be responsible for 1. full chip activities ... Understanding OCV, DFM, DFY Excellent Block level and Full-chip physical design skills Self-motivated, leadership... full job description

in India we are looking for fresh 2012passouts ENTRY LEVEL DESIGN ENGINEERS The candidates would be working on ... Job Location-Noida Career opportunity as core Design Engineer for Electronics & Communication Engineering B.E/B.Tech fro... full job description

Provide Physical verification support for both full chip and block designers and develop infrastructures to ... on knowledge of Physical Verification tools Transistor Level Custom Layout design/verification experience is a very... full job description

innovationsprovide highly integrated Systems-On-a-Chip (SoCs) for telecommunications,enterprise and consumer ... Customersupports Designation: Senior Validation Engineer Job Profile/Responsibilities: * You will be responsible... full job description

Self starter with 2-12 years of experience on SOC/Chip level/IP physical design on multimillion Gate and complex design with multiple clocks and power domains with minimal supervision. * Expertise in physical implementation & timing... full job description

(pre-layout) to backend (post-layout) at both chip level and block level * Develop or enhance timing related ... constraints partitioning/budgeting (from chip level to block level) * Ensure quality adherence during all... full job description

OVM/UVM and System Verilog, on both module level and chip level with the use of constrained random verification ... level who has worked extensively on OVM/UVM methodologies and are well versed in SV... full job description

Location Pune Designation: Senior Validation Engineer/ Staff Validation Engineer Job Profile/Responsibilities: Respo ... Validation Engineer/ Staff Validation Engineer Job Profile/Responsibilities: * Responsible... full job description

designers. TIS has worked with over 300 blue-chip organizations, creating more than 100,000 hours of ... performance tuning, refactoring, and release engineering · Rich user interface development experience... full job description

PHY devices in cutting edge geometries. Experience Level: • BS with 4-8 years experience Requirements: • 4 to 8 ... Should have gone through at least 1 full chip cycle all the way to production ( ideally non incremental chip ) •... full job description

a Master of Science degree in Computer Science, Electronics Engineering or a related discipline with five years of ... as the candidate will be working with various levels of engineering expertise in various geographies * Excellent... full job description

design",Architecture,"Systems engineering" Function IT Role Other ... are limitless, for you and for us! Director, Engineering Location: Bangalore Job Function: * Our broad... full job description

to relocate to Ahmedabad Designation – ASIC Design Engineer Key Responsibilities: · Define ... completion of the project. · Write top level Design Document. · Write System level verification... full job description

for participating in the pre-silicon blocks, chip, multi-chip and system level verification strategy for the Graphics chips.Architecting new verification methodologies and evaluating new tools.Experience in writing testplans and... full job description

of the chip from RTL/gates to tapeout. The Physical Design Engineer will be responsible for 1. full chip activities ... OCV, DFM, DFY * Excellent Block level and Full-chip physical design skills * Self-motivated, leadership... full job description

Electronics & communication/Electrical engineering/PHd -Good understanding of VLSI/EDA/Automation ... skills -Highly experienced LIB design engineer Experience Required: 3 to 5 Education Required:... full job description

In this role you will work as a Software Development Engineer for real-time embedded wireless systems. The candidate ... ability to work closely with engineering teams both in India & US • System-level knowledge of Microprocessor based... full job description

SoC Level Physical Design Engineer ICDS Place & Route(PnR),CTS,Floor Planning,Timing closure,Power Planning,IO planning ... chip level activities. Block (Medium complexity) level PD engineer Desired Candidate Profile3-6 years experience... full job description

PCS Technology is lookingDRC Engineer for following skill sets DRC/ TRC Engineer: Should have experience in repairing motherboard, SMPS, Chip Level service. Location : Bangalore If the profile seems interesting, Walk in from 14.05.2012... full job description

DFT Engineer (2-10 Yrs) with B.Tech/ Masters Degree in Electronics. # Should have handled chip-level hierarchical DFT ... Block & Chip level ATPG, Fault coverage improvements & simulation with Timing Scan failures/blockage, DFT DRC failures,... full job description

Auto req ID 18934BR Job Posting Title Senior Level Software Development Engineer Business Unit Infrastructure and ... & act as a technical liaison between Chip Development Teams and Application Teams/Customer... full job description

Developer Functional Area: Embedded/EDA /VLSI/ASIC/Chip Design Education: UG - B.Tech/B.E. - Any ... micro - controller Contact: Primus Rodrigues Robert Bosch Engineering Business Solutions Limi Telephone:... full job description

for the hardware development process. Ensure all hardware engineering projects, initiatives, and processes are in ... internal and external resources as needed to accomplish engineering objectives Lead the resolution of field... full job description

Tech Architect Functional Area Embedded/EDA /VLSI/ASIC/Chip Design Education UG - B.Tech/B.E. - Any ... Not Required Location Bengaluru/Bangalore Keywords CAD Engineer, Cadence, Virtuoso Contact Shashi Sandisk... full job description

Experience in ASIC tapeouts, preferably in 28nm, 45nm & 65nm, to leading foundries Experience in Block / Chip level P & ... - Other Specialization PG - M.Tech - Other Engineering Location Bengaluru/Bangalore Keywords Engineer, Senior Physica... full job description

Profile To design and develop driver and protocol level software for various innovative technologies currently ... Developer Functional Area Embedded/EDA /VLSI/ASIC/Chip Design Education UG - B.Tech/B.E. -... full job description

System Verilog Desired Profile Bachelor's or Master's in Engineering with 2 to 7 years of related work ... Software Developer Functional Area Embedded/EDA /VLSI/ASIC/Chip Design Education UG - B.Tech/B.E. - Any... full job description

Tech Architect Functional Area Embedded/EDA /VLSI/ASIC/Chip Design Education UG - B.Tech/B.E. - Any ... Not Required Location Bengaluru/Bangalore Keywords CAD Engineer, Support Contact Shashi Sandisk India Telephone... full job description

details 10th Marks Sheet 12th Marks Sheet All 8 Semester Engineering Marks Sheets Degree Certificate Last 2 months ... C++, RTOS, Embedded Contact Nagalakshmi Robert Bosch Engineering Business Solutions Limi 123, Industrial Layout... full job description

Understanding of ATE and test engineering. Post-Silicon debug. Programming in Perl, tcl, awk and c/c++. Experience in ... Design Engineer Functional Area Engineering Design, R&D Education UG - B.Tech/B.E... full job description

45nm & 65nm, to leading foundries Experience in Block / Chip level P & R. Clear understanding and command over all ... Software Developer Functional Area Embedded/EDA /VLSI/ASIC/Chip Design Education UG - B.Tech/B.E. - Any... full job description

the root cause of a problem or issue that have reached level 3 support. Reads and understands code, application ... System Admin Functional Area Embedded/EDA /VLSI/ASIC/Chip Design Education UG - Any Graduate PG - Any PG... full job description

Verification expertise (chip level and/or block level) - From spec to tape-out for complex designs. Test plan/testbench ... limited to cores/io's/memories and related logic). System level awareness - integration/ initialization/ bring-up /DFT... full job description

The Graphics Core Engineering (GCE) team needs an experienced software developer to deliver 2D Display ... Engineering degree or a Master of Science degree Computer Engineering or Electrical Engineering with more than two... full job description

The Graphics Core Engineering (GCE) team needs an experienced software developer to deliver 2D Display ... Engineering degree or a Master of Science degree Computer Engineering or Electrical Engineering with more than two... full job description

and techniques used in production. Advises design engineering on selection, application and test of electronic ... Lead/Tech Lead Functional Area Embedded/EDA /VLSI/ASIC/Chip Design Education UG - B.Tech/B.E. - Electrical,... full job description

The Graphics Core Engineering (GCE) team needs an experienced software developer to deliver 2D Display graphics ... Engineering degree or a Master of Science degree Computer Engineering or Electrical Engineering with more than two... full job description

be an added advantage Desired Profile The Graphics Core Engineering (GCE) team needs an experienced software ... platform device drivers. GCE is part of the Graphics Engineering team within the Visual Computing Group under the... full job description

of Test and measurement equipments Experience in usage of chip sets for Ethernet, TTP and CAN protocols Experience ... domain Desirable: Experience in LRU development of Level A/B/C systems as per DO-254 Tools: AMS simulator,... full job description

of Test and measurement equipments Experience in usage of chip sets for Ethernet, TTP and CAN protocols Experience ... domain Desirable: Experience in LRU development of Level A/B/C systems as per DO-254 Tools: AMS simulator,... full job description

are looking for an experienced VLSI ASIC implementation engineer. Candidate will work closely with Implementation ... and logic designing skills. Working exposure to chip level functional verification Good Knowledge of... full job description

/ University of applied sciences: degree in Electrical Engineering or Information Technology Work experience at ... - Electrical PG - Any PG Course Location Bengaluru/Bangalore Keywords Software design engineer, SystemC simulation, P... full job description

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Verification expertise (chip level and/or block level) - From spec to tape-out for complex designs. Test plan/testbench ... Course Location Bengaluru/Bangalore Keywords Verification Engineer, C++, Chip Level, System Verilog Contact HR IBM... full job description

programming and debugging skills (C/C++) Ability to engineer software which minimizes use of data memory, code ... is a big plus. BE in computer science or electrical engineering with 3+ years of experience or ME with 2+ years... full job description

Engineering degree or a Master of Science degree Computer Engineering or Electrical Engineering with more than three ... Software Developer Functional Area Embedded/EDA /VLSI/ASIC/Chip Design Education UG - B.Tech/B.E.PG -... full job description

possess Bachelors or higher degree in Computer Science / Engineering or Electronics and Communications with five to ... Computers, Electronics/Telecomunication PG Any PG Course Location Bengaluru/Bangalore Keywords SW Engineer, Andriod, L... full job description

Verification expertise (chip level and/or block level) - From spec to tape-out for complex designs. Test plan/testbench ... Course Location Bengaluru/Bangalore Keywords Verification Engineer ISTL, System Verilog, Specman, Vera , C++, CPU... full job description

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The individual will be responsible for RTL design and Verification experience (SOC/IP level) ... Mentoring and supporting junior engineers Desired Profile Bachelor or Master Degree in Electrical/Electronics Engineer... full job description

45nm & 65nm, to leading foundries Experience in Block / Chip level P & R. Clear understanding and command over all ... Bengaluru/Bangalore Keywords Physical Design, Chip Design, DRC, LVS, ASIC Tapeouts Contact HR Marvell... full job description

and/or a Bachelor of Technology degree in Electronics Engineering or Computer Science with minimum five years of ... Bengaluru/Bangalore Keywords Software Validation Engineer, C, C++ , PC architecture , Driver architecture ,... full job description

designing/ developing/ implementing graphics system-level software for future platforms. Desired ... Bengaluru/Bangalore Keywords Graphics Software Val Engineer, Contact HR Intel Technology India Pvt Ltd Website... full job description

are looking for an experienced VLSI ASIC implementation engineer. Candidate will work closely with Implementation ... and logic designing skills. Working exposure to chip level functional verification Good Knowledge of... full job description

ou will be responsible for specifying and communicating the engineering strategy, as well as working with all engineers ... CE, Power Sequencing, System Power Management, System Engineer Contact HR Nvidia Corporation Website... full job description