or related experience. System Verilog based Synopsys VMM/UVM environment,analyzing functional and code coverage, debugging tests and the design. Additional activities include creating assertions,design fixes, using a veriloglint... full job description

Backend/Frontend. Experience in Block Level Designing (Mandate) Experience in Fullchip Designing (Mandate) Should have Participated in Minimum of 3 Fullchip Tapeouts. Experience in Any of the Tool: Cadence, Synopsys, Magma or... full job description

Extensive experience and detailed knowledge in Cadence or Synopsys or Magma physical Design Tools. Expertise in scripting languages such as PERL, TCL Strong Physical Verification skill set. Static Timing Analysis in Primetime or... full job description

BIST. Anyone with good amount of experience in either of Synopsys, Mentor & Cadence tools meets our criteria. DFT - ATPG & DFT - MBIST. Required skills Scan insertion & ATPG using Fastscan/TestKompress... full job description

on experience and reasonable knowledge in Cadence and Synopsys Physical Implementation Tools Should have participated in a minimum of 3-4 fullchip tapeouts. Scripting Language with PERL, TCL, AWK, shell scripting is highly... full job description

on experience and reasonable knowledge in Cadence and Synopsys Physical Implementation Tools Should have participated in a minimum of 3-4 fullchip tapeouts. Scripting Language with PERL, TCL, AWK, shell scripting is highly... full job description

on experience and reasonable knowledge in Cadence and Synopsys Physical Implementation Tools Should have participated in a minimum of 3-4 fullchip tapeouts. Scripting Language with PERL, TCL, AWK, shell scripting is highly... full job description

planning and delivery In-dept experience of EDA tools from Synopsys or Cadence for Digital VLSI or Analog / Mixed circuit VLSI Knowledge of Reliability issues, Characterization, Datasheet preparation Should have done Network or Telecom... full job description

on experience and reasonable knowledge in Cadence and Synopsys Physical Implementation Tools Should have participated in a minimum of 3-4 fullchip tapeouts. Scripting Language with PERL, TCL, AWK, shell scripting is highly... full job description

be a power user of P&R and timing analysis CAD tools from Synopsys (ICC/DC/PT/STAR-RC), Cadence (First Encounter) or Magma (Talus) - Understanding of custom macro blocks such as RAMs, CAMs, high-speed IO drivers - Prior experience in... full job description

up with creative solutions. Exposure to designs critical for power, area and timing at the same time. Technologies from 90nm and below. In depth exposure in Implementation in any of the following platforms... full job description

up with creative solutions. Exposure to designs critical for power, area and timing at the same time. Technologies from 90nm and below. In depth exposure in Implementation in any of the following platforms... full job description

untry: India State/Province/County: Karnataka City: Bangalore Requirements/Qualifications (Education): B.Tech/M.E/M.Tech in ECE, Job Description: Library characterization using the Synopsys Characterization tool NCX. Exposure to CMOS... full job description

ASIC and/or SOC design flows. * Experience in HDL design with Systemverilog or Verilog. * Experience in RTL simulation and debug tools. * Expertise in timing and area closure using Synopsys Synthesis tools. * Scripting abilities. full job description

. - Strong in custom design tools like Cadence* Virtuoso*, Synopsys ICV, Custom designer, StarRC* XT and Mentor's Caliber etc. Alternatively an internal candidate with strong Genesys and physical design skills. - Good interpersonal and... full job description

debug tools. - Expertise in timing and area closure using Synopsys Synthesis tools. - Scripting abilities. Desirable qualifications: - Knowledge of Processor and/or Graphics designsJob Category: EngineeringFull/Part Time: Full TimeJob... full job description

. * Strong in custom design tools like Cadence* Virtuoso*, Synopsys ICV, Custom designer, StarRC* XT and Mentor's Caliber etc. Alternatively an internal candidate with strong Genesys and physical design skills. * Good interpersonal and... full job description

: Shine needs your Resume. Post CV Now www.FirstSalary.comNational Bulk Handling Corporation National Bulk Handling Corporation NBHC ( http://www.ftindia.com, http:.... Financial Technologies 6th Floor, Landmark B Wing, Suren Road,... full job description

extraction, EM/IR Drop Analysis, timing and Signal Integrity closure, physical verification, low power implementation etc • Hands on experience and expertise in Cadence, Synopsys, Magma or Mentor Physical Implementation Tools • Should... full job description

extraction, EM/IR Drop Analysis, timing and Signal Integrity closure, physical verification, low power implementation etc • Hands on experience and expertise in Cadence, Synopsys, Magma or Mentor Physical Implementation Tools • Should... full job description

past experience and expertise in Cadence, Synopsys, Magma or Mentor Physical Implementation Tools o Understanding of complete SoC development cycle, from architecture to post-silicon debug preferred o Should have participated in a minimum... full job description

with simulation tools like Hspice, Finesim, Hsim etc. and Synopsys liberty format description. CAD Engineer: Proficiency in Cadence SKILL Hands on experience in Perl, Tcl, C/C++ programming Experience in building flows to automate memory... full job description

debug tools. - Expertise in timing and area closure using Synopsys Synthesis tools. - Scripting abilities. Desirable qualifications: - Knowledge of Processor and/or Graphics designs Job Category : Engineering Primary Location :... full job description

. - Strong in custom design tools like Cadence* Virtuoso*, Synopsys ICV, Custom designer, StarRC* XT and Mentor's Caliber etc. Alternatively an internal candidate with strong Genesys and physical design skills. - Good interpersonal and... full job description

LSI design Silvaco Tools Good EDA knowledge SimuCad Cadence Synopsys Frontend design flow Backend Design Flow Mentor ... Good EDA knowledge, Silvaco Tools, SimuCad, Cadence, Synopsys, Mentor graphics, Frontend design flow, Backend... full job description

Library characterization using the Synopsys Characterization tool NCX. Exposure to CMOS basics and Spice Simulations full job description

techniques - Hands on knowledge of working on Cadence/ Synopsys/ Magma toolset - Worked on 65nm/ 45nm technology nodes - Good conceptual knowledge of OCV, MCMM analysis, EM-IR drop, low power methodologies Responsibilities*: • Understand... full job description

with Verilog RTL coding, Verilog Simulators (NC or VCS) , Synopsys Design Compiler, Synopsys ICC Physical design tools, PrimeTime for Static Timing Analysis, Mentor FastScan, LogicVision, Verplex (or Formality), and scripting. Job... full job description

with simulation tools like Hspice, Finesim, Hsim etc. and Synopsys liberty format description. CAD Engineer: Proficiency in Cadence SKILL Hands on experience in Perl, Tcl, C/C++ programming Experience in building flows to automate memory... full job description

Tools experience: Synopsys DC/PC Synopsys Primetme Mentor DFT-Fastscan 0-in Mandatory skills that they should have worke ... Tools experience: · Synopsys DC/PC Synopsys Primetme... full job description

using Synopsys DC / Cadence RC compiler # Experience with Synopsys PrimeTime Must #Understanding of Verilog/VHDL RTL constructs # Exposure to DDR2/3, high speed I/O timing Desired Candidate ProfileSTA / TIMING Engineer (2-8 Yrs) with... full job description

in SOC Place/route tools Magma TALUS or Synopsys ICC. # Exp. in PTSI static timing tool suite, Calibre Physical Verification tool suite is PLUS. # Semi custom PnR Implementation is plus Desired Candidate Profile# Physical implementation... full job description

in SOC Place/route tools Magma TALUS or Synopsys ICC. 3. Good Knowledge on PrimTime STA Desired Candidate Profile# Physical implementation of high performance processor, DSP & Graphics cores. # Activities include floorplanning, PnR, Clock... full job description

experience and detailed knowledge in Cadence or Synopsys or Magma physical Design Tools. Expertise in scripting languages such as PERL, TCL. Strong Physical Verification skill set. Static Timing Analysis in Primetime or... full job description

Spyglass Lint/CDC checks and waiver creation ->Expertise in Synopsys Design Compiler Synthesis ->Expertise in formal verification with Cadence LEC ->Understanding of RTL to GDS flow ->Working knowledge of timing closure is a... full job description

Synthesis, P& R, extraction, EM/IR Drop Analysis, timing and Signal Integrity closure, physical verification, low power implementation etc Hands on experience and expertise in Cadence, Synopsys, Magma or Mentor Physical Implementation... full job description

PLLs,LDO. Experience in Top level Integration is a plus. Tool Experience Requirement: Cadence Virtuso ,Vxl and Virtuoso, Schematic Composer, and verifications tools including Assura, Mentor/Synopsys Calibre /Hercules LVS, DRC, STarRC... full job description

(include ModelSim or VCS simulator) preferably with Synopsys DFTC and TetraMax or Encounter Test experience. On the MBIST front, experience in memory BIST insertion and verification (include ModelSim or VCS simulator). Kindly share your... full job description

delay/noise analysis & repair using Cadence/Synopsys/Magma tools. * Expertise in clock tree closure from Frequency/Power/EMC/Reliability perspective. * Sound knowledge of electrical as well as physical constraints/rules is desired... full job description

Cadence Encounter Test or Mentor FastScan ATPG tools * Synopsys DFTC scan insertion * Experience with industry simulation tools such as VCS, ModelSim, Ncverilog etc., * Direct experience in silicon bring-up, debug, and validation of DFT... full job description

; 10+yrs in physical design,5+yrs as physical lead 3socs,rtl,gdsii,synthesis,sta,floor planning eda tools cadance,magma and synopsys. Apply Now full job description

Synopsys tool, Cadence DFT tool, PT and PTSI tool from Synopsys, Verilog/VHDL - 4 to 5 years of ... sound & good team player Required Technical Skills: 4-5 Yrs of experience on Magma Talus, Synopsys ICC Apply... full job description

4 yrs experience in Physical Design o Experience in leading HM / full-chip Timing closure & Physical Design activities. o Hands on experience using Cadence First Encounter, Magma Talus, Synopsys ICC PNR tools o Hands on experience with... full job description

etc * Hands on experience and expertise in Cadence, Synopsys, Magma or Mentor Physical Implementation Tools * Should have participated in a minimum of 3 fullchip tapeouts.Exp: 4+ yearsJob Location: HyderabadBest Regards Srinivas V | Key... full job description

on cadence tools for layout design and Cadence/Mentor/Synopsys tools for physical verification checks. He/She must have good understanding of Basics of CMOS circuits. Preferable candidate to have Skill and perl scripting experience to... full job description

using Synopsys DC / Cadence RC compiler # Experience with Synopsys PrimeTime Must #Understanding of Verilog/VHDL RTL constructs # Exposure to DDR2/3, high speed I/O timing Desired Candidate ProfileSTA / TIMING Engineer (2-8 Yrs) with... full job description

ProfileMandatory Skills: Exp. in STA tools such as Synopsys Primetime-SI or Cadence ETS.formal verification such as Cadence s Conformal equivalence checker.Exp in synthesis, floor planning, IR drop, dynamic power analysis and noise... full job description

with Verilog RTL coding, Verilog Simulators (NC or VCS) , Synopsys Design Compiler, Synopsys ICC Physical design tools, PrimeTime for Static Timing Analysis, Mentor FastScan, LogicVision, Verplex (or Formality), and scripting. Job... full job description

ability to work in a team environment Tools - Synopsys ICC, Astro, PTSI, Calibre/Hercules DRC/LVS Responsibilities Implementation of multimillion gate ASIC designs in cutting edge process technologies (28nm, 45nm, 65nm, 90nm) Ownership... full job description

ability to work in a team environment Tools - Synopsys ICC, Astro, PTSI, Calibre/Hercules DRC/LVS Responsibilities: Implementation of multimillion gate ASIC designs in cutting edge process technologies (28nm, 45nm, 65nm,... full job description

ability to work in a team environment Tools - Synopsys ICC, Astro, PTSI, Calibre/Hercules DRC/LVS Qualifications: Graduates with M.E (Microelectronics) degree from reputed institutes with 0 ? 6 years experience. Experience 0 - 5... full job description

• Digital design and development (RTL) • Synopsys Design Compiler Synthesis • RF/ Board Design Design Verification • Emulation and post silicon validation • Strong in C programming. • Passion and energy to learn new technologies. •... full job description

with basic ESD concepts.- Familiarity with ASIC flow: Synopsys libraries, LEF generation, Place & Route & understanding of top level verification flow.- DDR2, DDR3 design experience including LPDDR, LPDDR2. General Understanding of the DDR... full job description

Vera, e and/or VHDL. F) Proficient in commercial EDA tools (Synopsys VCS, Verdi). G) Experience with one or more scripting languages: Perl, shell, python, Tcl, and/or ruby. H) Experience with one or more programming languages: C++, and/or... full job description

in using Virtual Platform tools (ARM Fast Models, Synopsys Virtualizer, Cadence VSP, Windriver SIMICS) * Data structures, algorithms, and programming concepts * Knowledge of Microprocessor, Microcontrollers, SoC architecture, bus... full job description

Tetramax - Synopsys tool, Cadence DFT tool, PT and PTSI tool from Synopsys, Verilog/VHDL 2. Good experience in doing hands on DFT 3. Should have done block level DFT and full chip DFT If interested mail your CV to ashwinikn... full job description

in doing hands on physical design - Preferred Synopsys ICC, Magma Talus . - Strong fundamentals ... Yrs of experience on , 1. Magma Talus, Synopsys ICC * Soft Skills [Required] Strong in technical... full job description

on physical design * Preferred Magma Talus experience or Synopsys ICC on at least one project. * Strong fundamentals on Physical design including Floorplan, power grid analysis, placement, cts, routing, DRC-LVS closure, timing... full job description

on physical design Preferred Magma Talus experience or Synopsys ICC or Cadence SoC Encounter on at least one ... ICC(Synopsys) tool or SoC Encounter PT and PTSI tool from Synopsys 2. Strong in technical and non-technical... full job description

experience with synthesis, design closure with Synopsys or Cadence tools (Design Compiler, PrimeTime, RC) • Should have participated in successful tapeouts of DSM SoC/ASIC chips at 65nm or below • Deep understanding of front-end SoC/ASIC... full job description

Strong Synopsys Astro/ICC experience a plus. Having strong Mentor Calibre skills a plus. Strong communications skills are important to this position. This is a position for developing and honing verbal and written communication skills, and... full job description

- experience in doing hands on physical design - Preferred Synopsys ICC or Magma Talus will be fine with working on one ... expertise in Tcl, Perl, Shell scripting - Technically sound & good team player- Experience on Magma Talus, Synopsys... full job description

Experience in NC/VCS extensively for DFT simulations and debugging SDF simulations issues Experience in Synopsys DC for synthesis or Cadence LEC tools for logic equivalency checks Good scripting knowledge using tcl, awk, sed, perl and... full job description

In depth exposure in Implementation in any of the following platforms (Magma/Encounter/Mentor/Synopsys). Tool exposure in sign off(DRC/LVS/PT) About Tech Vulcan: Tech Vulcan is a technology services company focused on providing VLSI design... full job description

activities for the design. Experience with Synopsis DC &Synopsys Primetime tools and Primetime SI tools are required. Experience with Cadence RC and ETS is a preferred. The candidate should have very good knowledge about Architecture, RTL,... full job description

of Solutions Group at Synopsys, you will be working with of Synopsys customers using Synopsys DesignWare DDRn IP. - You will analyze and resolve complex IP usage challenges. - You will be interfacing with our Design Engineering team to... full job description

(include ModelSim or VCS simulator) preferably with Synopsys DFTC and TetraMax or Encounter Test experience. On the MBIST front, experience in memory BIST insertion and verification (include ModelSim or VCS simulator). Professionals... full job description

Extensive experience and detailed knowledge in Cadence or Synopsys or Magma physical Design Tools. Expertise in scripting languages such as PERL, TCL Strong Physical Verification skill set. Static Timing Analysis in Primetime or... full job description

and logic/physical synthesis using Cadence (preferred) or Synopsys synthesis tools. Expert working knowledge of synthesis methodology/scripts and tool options is expected. The candidate should have good knowledge of related front-end tools... full job description

(include ModelSim or VCS simulator) preferably with Synopsys DFTC and TetraMax or Encounter Test experience. * On the MBIST front, experience in memory BIST insertion and verification (include ModelSim or VCS simulator). Functional Area:... full job description

in using Virtual Platform tools (ARM Fast Models, Synopsys Virtualizer, Cadence VSP, Windriver SIMICS) Data structures, algorithms, and programming concepts Knowledge of Microprocessor, Microcontrollers, SoC architecture, bus protocols... full job description

Develop cutting edge custom VLSI flows including Synopsys DC/ICC based synthesis and place-and-route. Applications to be developed include special purpose routers, floor planning and data path tools. Work closely with physical design team... full job description

and development (RTL) · Expertise in Verilog/VHDL · Synopsys Design Compiler Synthesis · RF/ Board Design · Design Verification · Emulation and post silicon validation RF/Board Designing Physical Designing and Verification Desired... full job description

in using Virtual Platform tools (ARM Fast Models, Synopsys Virtualizer, Cadence VSP, Windriver SIMICS) Data structures, algorithms, and programming concepts Knowledge of Microprocessor, Microcontrollers, SoC architecture, bus protocols... full job description

in Electronics. # Worked on full chip synthesis using Synopsys DC / Cadence RC compiler # Experience with Synopsys PrimeTime - Must #Understanding of Verilog/VHDL RTL constructs # Exposure to DDR2/3, high speed I/O timing # SOC/Chip level... full job description

in SOC Place/route tools Magma TALUS or Synopsys ICC. 3. Good Knowledge on PrimTime STA # Physical implementation of high performance processor, DSP & Graphics cores. # Activities include floorplanning, PnR, Clock Tree Synthesis, Timing... full job description

Technical writer City: Bangalore Country: India Contract/Permanent: Permanent Job Details Synopsys is seeking capabiliti ... Technical writer City: Bangalore Country: India Contract/Permanent: Permanent Job Details:- Synopsys is seeking capabili... full job description

Xpropgation & design issues & guidelines. [MBIST Architect, Synopsys - DFT Max, Test Compress]. Desired Candidate Profile1) Able to do ATPG with RAMs & Latches 2) Coverage analysis 3) Path delay tests 4) Delay coverage analysis Also... full job description

Job Description: Roles & Responsibilities: • Would be part of the team developing Verification IPs and / or working on SoC verification. • Person would be working on different phases of development, including design, coding, test planning,... full job description

and design issues and guidelines. [MBIST Architect, Synopsys - DFT Max, Test Compress]. • L1 + Hierarchical scan synthesis with scan segmentations. • Able to do Sequential ATPG with RAMs and latches, coverage analysis. Path Delay... full job description

on cadence tools for layout design and Cadence/Mentor/Synopsys tools for physical verification checks. He/She must have good understanding of Basics of CMOS circuits. Preferable candidate to have Skill and perl scripting experience to... full job description

front-end design cycle. * Should definitely have Synthesis (Synopsys DC) and Simulation(Verilog-XL/NC or VCS) tool knowledge. * Sound Digital Design Fundamentals. * Knowledge of microprocessors is essential Domain knowledge in related... full job description

Should have done block level designs for at least 1-2 tapeout - Preferred Magma Talus experience or Synopsys ICC - 2+ Yrs of experience on ,Magma Talus, ICC(Synopsys) tool, PT and PTSI tool from... full job description

idation, Timing Analysis 1-4 tape out at SoC level Technically sound & good team player * Technical Skill Required Tetramax - Synopsys tool, Cadence DFT tool, PT and PTSI tool from Synopsys, Verilog/VHDL Kindly share your updated profile... full job description

crosstalk delay/noise analysis & repair using Cadence/Synopsys/Magma tools. *Expertise in clock tree closure from Frequency/Power/EMC/Reliability perspective. *Sound knowledge of electrical as well as physical constraints/rules is desired... full job description

should have a very good handle on the ATPG tool (either Synopsys’ s Tetramax or Cadence’ s ET ATPG tool) 3)Experience on Cadence ET ATPG tool is definitely preferable since the project will be done with ET 4)Should have experience on scan... full job description

or more EDA tool flow Cadence, Magma, Synopsys. - Preferred - Experience with Magma and Synopsys tool flows · Should have done Physical design for two or more large complex ASIC/SoC · Understands application architectures and has good... full job description

understanding of tools like Cadence ICFB, Mentor Calibre, Synopsys Hercules 7. LEF usage understanding at chip level ... process technology - Layout Verification expertise using Synopsys Hercules Experience Required: 8 to 10 Education... full job description

on cadence tools for layout design and Cadence/Mentor/Synopsys tools for physical verification checks. He/She must have good understanding of Basics of CMOS circuits. Preferable candidate to have Skill and perl scripting experience to... full job description

Strong Synopsys Astro/ICC experience a plus. Having strong Mentor Calibre skills a plus. Desired Candidate ProfilePlease refer to the Job description above Experience Required: 3 to 6 Education Required: (UG - Any Graduate - Any... full job description

be a power user of P&R and timing analysis CAD tools from Synopsys (ICC/DC/PT/STAR-RC), Cadence (First Encounter) or Magma (Talus) - Understanding of custom macro blocks such as RAMs, CAMs, high-speed IO drivers - Prior experience in... full job description

sertion and validation, Timing Analysis - 3-5 tape out at SoC level Technically sound & good team player Tetramax - Synopsys tool, Cadence DFT tool, PT and PTSI tool from Synopsys, Verilog/VHDL - Should have done... full job description

Platform tools (ARM Fast Models, Synopsys Virtualizer, Cadence VSP, Windriver SIMICS) • Data structures, algorithms, and programming concepts • Knowledge of Microprocessor, Microcontrollers, SoC architecture, bus protocols etc. • Should... full job description

in using Virtual Platform tools (ARM Fast Models, Synopsys Virtualizer, Cadence VSP, Windriver SIMICS) Data structures, algorithms, and programming concepts Knowledge of Microprocessor, Microcontrollers, SoC architecture, bus protocols... full job description

• Should definitely have Synthesis (Synopsys DC) and Simulation(Verilog-XL/NC or VCS) tool knowledge. • Sound Digital Design Fundamentals. • Knowledge of microprocessors is essential Domain knowledge in related areas of work say PCIe,... full job description

Clear understanding and command over all aspects of physical design Expertise in Synopsys IC Compiler / Magma Talus / Cadence SoC Encounter Skill and experience in scripting using Tcl or Perl desirable. Interested Professionals can Kindly... full job description

Experience in doing hands on physical design,Preferred Synopsys ICC, Magma Talus on at least four project.Physical design, floorplan, Powerplan, placement and Routing, ICC, Magma Talus, CTS, DRC-LVS, Timing Closure, Antenna fixing, Signal... full job description

Tools experience: Synopsys DC/PC Synopsys Primetme Mentor DFT-Fastscan 0-in Mandatory skills that they should have worke ... Tools experience: · Synopsys DC/PC Synopsys Primetme... full job description

Perl, TCL, and shell scripts. * Expertise in using Synopsys, Magma and/or Cadence synthesis and STA tools. * Good communication and presentation skills and team work. Additional Preferred Qualifications: * Exposure to spyglass checks,... full job description

(perl, python, tcl) * Knowledge of EDA vendor tools from Synopsys, Cadence and Mentor desired. In particular experience with PTSI, First Encounter, Nanoroute, Calibre, StarRC, and conformal is very desirable * VLSI process and device... full job description